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Not offered in the current semester · Last offered AY2023/2024 Semester 2
ModsEE4614

Device Parameter Extraction Layout Implementation

Last offered — AY2023/2024 Semester 2

This course aims to teach you the computer aided design of semiconductor devices and integrated circuits. In the first part, you will learn circuit simulation using the MOS transistor model and explore the impact of mask layout design on circuit performance. The process from simplified Boolean expression to actual circuit layout will be taught. In the second part, you will learn virtual device characterization using device simulator software to obtain the current-voltage characteristics of a MOS transistor. The third part is concerned with the extraction techniques of transistor parameters such as the threshold voltage.

AUs2.0 AUs
Grade Type
PrerequisiteEE3013
Not Available To Programme
Not Available To All Programme With
Not Available As BDE/UE To Programme
Not Available As Core To Programme
Not Available As PE To Programme
Mutually Exclusive WithEE4611, EE4612
Not Offered As BDE
Not Offered As Unrestricted Elective
Exam

Total hours per week: 6 hrs

Available Indexes

MonTueWedThuFri
930
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Other offerings

AY22/23
Semester 1Semester 2Sp. Term
AY21/22
Semester 1Semester 2Sp. Term
AY20/21
Semester 1Semester 2Sp. Term
AY19/20
Semester 1Semester 2Sp. Term
AY18/19
Semester 1Semester 2Sp. Term
AY17/18
Semester 1Semester 2Sp. Term
AY16/17
Semester 1Semester 2Sp. Term
AY15/16
Semester 1Semester 2Sp. Term
AY14/15
Semester 1Semester 2Sp. Term

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