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ModsEE4614AY2017/2018 Semester 2
Device Parameter Extraction Layout Implementation
AY2017/2018 Semester 2
Virtual Device Characterization. Transistor Parameter Extraction. Circuit Simulation and Mask Layout Design.
| AUs | 2.0 AUs |
| Categories | Core |
| Mutually Exclusive With | EE4611, EE4612 |
| Exam |
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