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ModsEE4323

MixedSignal Ic Design

Current offering — AY2026/2027 Semester 1

The objective of this course is to introduce circuit design concepts for basic building blocks used in mixed?signal integrated circuit designs. The course will provide you with the skills to design mixed?signal integrated circuits with these building blocks.

Total hours per week: 6 hrs

AUs3.0 AUs
Grade Type
PrerequisiteEE3019
Exam3 December 2026, 9.00 am - 11.00 am

The Exam information shown may be subject to changes. Students are to check the finalised exam timetable with exam seat information, which will be available at the 'Examination Seating Arrangement' webpage, 2 weeks before start of examination.


Prerequisite Graph

EE4323

Mixed-Signal Ic Design

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Available Indexes

MonTueWedThuFri
930

COMMON LEC (F61)

0930-1220 Wed

S1-B2B-10

Wk7-13

1000
1030
1100
1130
1200
1230
1300
1330

COMMON LEC (F62)

1330-1620 Wed

S1-B2B-10

Wk7-13

COMMON LEC (F61)

1330-1620 Thu

LT25

Wk1-6

COMMON LEC (F62)

1330-1620 Thu

LT25

Wk1-6

1400
1430
1500
1530
1600

Other offerings

AY25/26
Semester 1Semester 2Sp. Term
AY24/25
Semester 1Semester 2Sp. Term

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