Not offered in the current semester · Last offered AY2018/2019 Semester 1
The objective of this course is to introduce a hardware description language (HDL) for the specification, simulation, synthesis and implementation of digital logic systems. The students will have design practice sessions designing and implementing digital logic systems with commercial electronic design automation (EDA) tools. Digital Design using Hardware Description Language. Design Practice.
| AUs | 2.0 AUs |
| Grade Type | |
| Prerequisite | EE2004, E280 |
| Not Available To Programme | |
| Not Available To All Programme With | |
| Not Available As BDE/UE To Programme | |
| Not Available As Core To Programme | |
| Not Available As PE To Programme | |
| Mutually Exclusive With | |
| Not Offered As BDE | |
| Not Offered As Unrestricted Elective | |
| Exam |
Total hours per week: 3 hrs
Available Indexes
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 930 | |||||
| 1000 | |||||
| 1030 | |||||
| 1100 | |||||
| 1130 | |||||
| 1200 | |||||
| 1230 | |||||
| 1300 | |||||
| 1330 | |||||
| 1400 | |||||
| 1430 | |||||
| 1500 | |||||
| 1530 | |||||
| 1600 | |||||
| 1630 | |||||
| 1700 | |||||
| 1730 | |||||
| 1800 |
Other offerings
AY17/18
AY16/17
AY15/16
AY14/15
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