Historical snapshot — AY2015/2016 Semester 1 · View current offering →
ModsEE4305AY2015/2016 Semester 1
Digital Design With Hdl
AY2015/2016 Semester 1
The objective of this course is to introduce a hardware description language (HDL) for the specification, simulation, synthesis and implementation of digital logic systems. The students will have design practice sessions designing and implementing digital logic systems with commercial electronic design automation (EDA) tools. Digital Design using Hardware Description Language. Design Practice.
| AUs | 2.0 AUs |
| Categories | Core |
| Exam |
Available Indexes
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 930 | |||||
| 1000 | |||||
| 1030 | |||||
| 1100 | |||||
| 1130 | |||||
| 1200 | |||||
| 1230 | |||||
| 1300 | |||||
| 1330 | |||||
| 1400 | |||||
| 1430 | |||||
| 1500 | |||||
| 1530 | |||||
| 1600 | |||||
| 1630 | |||||
| 1700 | |||||
| 1730 | |||||
| 1800 |