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Not offered in the current semester · Last offered AY2019/2020 Semester 1
ModsEE4646

Vlsi Technology

Last offered — AY2019/2020 Semester 1

Advanced MOS structures and process technology. Advanced bipolar transistors and process technology. MOS scaling rules and small geometry effects. CMOS latchup and isolation. Details: 1) MOS Structure. MOSFETS. NMOS Process. CMOS Process. P-Well CMOS. N-Well CMOS. Twin-Well CMOS. 2) Basic Bipolar Transistor Structures. Advanced Bipolar Transistor Structures. Introduction of BiCMOS. 3) Geometry Effect on Circuit Speed. Experimental Short-Channel Characteristics. Short-Channel Effect on Drain Current. Geometry Effects on Threshold Voltage. Hot Carrier Effect and Drain Engineering. Scaling Laws of MOS Devices. Velocity Saturation. 4) CMOS Latchup: Basic Switching Operation, Causes of Latchup, Latchup Characterization, and Latchup Prevention. 5) MOS Isolation. CMOS Isolation. New Isolation Techniques for CMOS.

AUs3.0 AUs
Grade Type
PrerequisiteEE3013
Not Available To Programme
Not Available To All Programme With
Not Available As BDE/UE To Programme
Not Available As Core To Programme
Not Available As PE To Programme
Mutually Exclusive With
Not Offered As BDE
Not Offered As Unrestricted Elective
Exam

Total hours per week: 3 hrs