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Historical snapshot: AY2026/2027 Semester 1 · View current offering
ModsSC2103AY2026/2027 Semester 1

Digital Systems Design

AY2026/2027 Semester 1

This course aims to develop skills in digital hardware design to meet basic industry expectations. Here, the principles established in CE1005/CZ1005/SC1005-Digital Logic will be extended to encompass circuits of greater complexity. These circuits are no longer implemented using multiple discrete logic elements, as presented in CE1005/CZ1005/SC1005, but rather use Application Specific Gate Array (ASIC) or Field Programmable Gate Array (FPGA) technologies. Both of these technologies can accommodate circuits of complexity equivalent to many millions of gates. This course will focus on FPGA technology as it is gaining commercial popularity (due to the cost of ASIC Implementations). The necessary logic and connectivity for both technologies is synthesised by software tools from code written in a Hardware Description Language. As such, this course presents you with circuit design techniques for more advanced systems in a methodical manner based on modern design techniques.

AUs3.0 AUs
Categories
CoreMinorsBDE
Not Available To ProgrammeEEE, EEE 1, EEEC, ENG(EEE), ENG(ME), ENG(NULL), ME, ME 1, ME(DES), ME(DES) 1, ME(IDMS), ME(IMS), ME(IMS) 1, ME(RMS), ME(RMS) 1, MEEC, MEEC(DES), MEEC(IDMS), MEEC(IMS), MEEC(RMS)
Mutually Exclusive WithCE2003, CE2103
Exam25 November 2026, 5.00 pm - 7.00 pm

Available indexes

MonTueWedThuFri
1130

10292 TUT (SCEL)

1130-1220 Thu

LT14

Wk2-13

10293 TUT (SCEL)

1130-1220 Thu

LT14

Wk2-13

1200
1230

10292 LAB (SCMA)

1230-1420 Tue

HPL

Odd Weeks

10293 LAB (SCMB)

1230-1420 Tue

HWLAB3

Odd Weeks

COMMON LEC (SCL2)

1230-1420 Wed

LT10

1300
1330
1400

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