Historical snapshot — AY2020/2021 Semester 2 · View current offering →

Digital Logic

AY2020/2021 Semester 2

Binary variables and logic gates; implementation technologies; combinatorial circuits; binary integers and arithmetic circuits; sequential circuits; simple state machines; digital design using hardware description languages.

AUs	3.0 AUs
Categories	CoreMinorsBDE
Not Available To Programme	BCE, BUS(BA), BUS(IT), CE, CEEC, EEE, EEEC, ENE(Direct Entry), ENG(EEE), ENG(NULL), IEEC, IEM
Mutually Exclusive With	CE1005, CE1105, CZ1005, EE2004, IM1004
Exam

Available Indexes

	Mon		Tue	Wed	Thu	Fri
830	13803 LAB (DD1) 0830-1030 Mon HWLAB3 Odd Weeks		10079 LAB (F3) 0830-1030 Tue HWLAB3 Odd Weeks		13804 LAB (DD2) 0830-1030 Thu HWLAB3 Even Weeks
900
930
1000
1030	10079 TUT (F3) 1030-1130 Mon LHN-TR+16 Wk2-13		COMMON LEC (CS1) 1030-1130 Tue ONLINE			COMMON LEC (CS1) 1030-1130 Fri ONLINE
1100	10079 TUT (F3) 1030-1130 Mon LHN-TR+16 Wk2-13		COMMON LEC (CS1) 1030-1130 Tue ONLINE			COMMON LEC (CS1) 1030-1130 Fri ONLINE
1130	10080 TUT (F4) 1130-1230 Mon TR+15 Wk2-13
1200	10080 TUT (F4) 1130-1230 Mon TR+15 Wk2-13
1230	13803 TUT (DD1) 1230-1330 Mon TR+9 Wk2-13		13805 LAB (DD3) 1230-1430 Tue HWLAB3 Even Weeks
1300	13803 TUT (DD1) 1230-1330 Mon TR+9 Wk2-13
1330
1400
1430	13804 TUT (DD2) 1430-1530 Mon TR+15 Wk2-13	13805 TUT (DD3) 1430-1530 Mon TR+18 Wk2-13		10080 LAB (F4) 1430-1630 Wed HWLAB3 Even Weeks
1500	13804 TUT (DD2) 1430-1530 Mon TR+15 Wk2-13	13805 TUT (DD3) 1430-1530 Mon TR+18 Wk2-13
1530
1600

	Mon	Tue	Wed	Thu	Fri
930
1000
1030
1100
1130
1200
1230
1300
1330
1400
1430
1500
1530
1600
1630
1700
1730
1800