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AY2018/2019 Semester 2
Process integration for ULSI devices. CMOS well/isolation/gate module technology. Contact module technology. Interconnect and Metallization. Applications of Thin Films
| AUs | 3.0 AUs |
| Categories | CoreBDE |
| Mutually Exclusive With | MS4503 |
| Exam |
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 930 | |||||
| 1000 | |||||
| 1030 | |||||
| 1100 | |||||
| 1130 | |||||
| 1200 | |||||
| 1230 | |||||
| 1300 | |||||
| 1330 | |||||
| 1400 | |||||
| 1430 | |||||
| 1500 | |||||
| 1530 | |||||
| 1600 | |||||
| 1630 | |||||
| 1700 | |||||
| 1730 | |||||
| 1800 |
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 1030 | 15341 TUT (T1) 1030-1130 Mon TR+21 Wk2-13 | ||||
| 1100 | |||||
| 1130 | 15342 TUT (T2) 1130-1230 Mon TR+21 Wk2-13 | ||||
| 1200 | |||||
| 1230 | |||||
| 1300 | |||||
| 1330 | |||||
| 1400 | |||||
| 1430 | |||||
| 1500 | |||||
| 1530 | COMMON LEC (LE) 1530-1730 Mon LT6 | ||||
| 1600 | |||||
| 1630 | |||||
| 1700 |
