Historical snapshot — AY2017/2018 Semester 1 · View current offering →

Digital Electronics

AY2017/2018 Semester 1

Digital Fundamentals. Digital Circuits; Combinational Logic Principles. Combinational Logic Circuits. Sequential Logic Principles. Sequential Logic Circuits. Memory, CPLDs, and FPGAs.

AUs	4.0 AUs
Categories	Core
Mutually Exclusive With	IM1004
Exam

Available Indexes

	Mon		Tue		Wed			Thu		Fri
930			32033 TUT (TA03) 0930-1130 Tue TR+63	32043 TUT (TC02) 0930-1130 Tue TR+67	32036 TUT (TA06) 0930-1130 Wed TR+63			32038 TUT (TA08) 0930-1130 Thu TR+63	32050 TUT (TC09) 0930-1130 Thu TR+67
1000
1030	32031 TUT (TA01) 1030-1230 Mon TR+63	32042 TUT (TC01) 1030-1230 Mon TR+67				32046 TUT (TC05) 1030-1230 Wed TR+68	32047 TUT (TC06) 1030-1230 Wed TR+69
1100
1130
1200
1230			32034 TUT (TA04) 1230-1430 Tue TR+63							32052 TUT (TC11) 1230-1430 Fri TR+65
1300
1330	32032 TUT (TA02) 1330-1530 Mon TR+63			32044 TUT (TC03) 1330-1530 Tue TR+67	32037 TUT (TA07) 1330-1530 Wed TR+63	32048 TUT (TC07) 1330-1530 Wed TR+67		32039 TUT (TA09) 1330-1530 Thu TR+63	32051 TUT (TC10) 1330-1530 Thu TR+67
1400
1430
1500
1530			32035 TUT (TA05) 1530-1730 Tue TR+63	32045 TUT (TC04) 1530-1730 Tue TR+67	32049 TUT (TC08) 1530-1730 Wed TR+63
1600
1630
1700

	Mon	Tue	Wed	Thu	Fri
930
1000
1030
1100
1130
1200
1230
1300
1330
1400
1430
1500
1530
1600
1630
1700
1730
1800