Historical snapshot — AY2016/2017 Semester 1 · View current offering →

Digital Electronics

AY2016/2017 Semester 1

Digital Fundamentals. Digital Circuits; Combinational Logic Principles. Combinational Logic Circuits. Sequential Logic Principles. Sequential Logic Circuits. Memory, CPLDs, and FPGAs.

AUs	4.0 AUs
Categories	Core
Mutually Exclusive With	IM1004
Exam

Available Indexes

	Mon			Tue			Wed				Thu			Fri
930	32045 TUT (TC01) 0930-1130 Mon TR+65			32036 TUT (TA04) 0930-1130 Tue TR+62	32037 TUT (TA05) 0930-1130 Tue TR+63						32042 TUT (TA10) 0930-1130 Thu TR+62	32053 TUT (TC09) 0930-1130 Thu TR+66	32054 TUT (TC10) 0930-1130 Thu TR+67
1000
1030							32047 TUT (TC03) 1030-1230 Wed TR+63	32048 TUT (TC04) 1030-1230 Wed TR+64
1100
1130
1200
1230														32044 TUT (TA12) 1230-1430 Fri TR+61	32057 TUT (TC13) 1230-1430 Fri TR+64
1300
1330	32033 TUT (TA01) 1330-1530 Mon TR+62	32034 TUT (TA02) 1330-1530 Mon TR+63		32038 TUT (TA06) 1330-1530 Tue TR+61			32040 TUT (TA08) 1330-1530 Wed TR+62	32041 TUT (TA09) 1330-1530 Wed TR+63	32049 TUT (TC05) 1330-1530 Wed TR+65	32050 TUT (TC06) 1330-1530 Wed TR+66	32043 TUT (TA11) 1330-1530 Thu TR+62	32055 TUT (TC11) 1330-1530 Thu TR+66
1400
1430			32035 TUT (TA03) 1430-1630 Mon TR+64		32039 TUT (TA07) 1430-1630 Tue TR+62	32046 TUT (TC02) 1430-1630 Tue TR+64
1500
1530							32051 TUT (TC07) 1530-1730 Wed TR+64	32052 TUT (TC08) 1530-1730 Wed TR+65			32056 TUT (TC12) 1530-1730 Thu TR+62
1600
1630
1700

	Mon	Tue	Wed	Thu	Fri
930
1000
1030
1100
1130
1200
1230
1300
1330
1400
1430
1500
1530
1600
1630
1700
1730
1800