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AY2015/2016 Semester 2
Digital Fundamentals. Digital Circuits; Combinational Logic Principles. Combinational Logic Circuits. Sequential Logic Principles. Sequential Logic Circuits. Memory, CPLDs, and FPGAs.
| AUs | 4.0 AUs |
| Categories | Core |
| Mutually Exclusive With | IM1004 |
| Exam |
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 930 | |||||
| 1000 | |||||
| 1030 | |||||
| 1100 | |||||
| 1130 | |||||
| 1200 | |||||
| 1230 | |||||
| 1300 | |||||
| 1330 | |||||
| 1400 | |||||
| 1430 | |||||
| 1500 | |||||
| 1530 | |||||
| 1600 | |||||
| 1630 | |||||
| 1700 | |||||
| 1730 | |||||
| 1800 |
| Mon | Tue | Wed | Thu | Fri | ||||
|---|---|---|---|---|---|---|---|---|
| 1030 | 32099 TUT (TD03) 1030-1130 Fri TR+69 Wk2-13 | |||||||
| 1100 | ||||||||
| 1130 | 32099 TUT (TD03) 1130-1230 Fri TR+69 Wk2-13 | |||||||
| 1200 | ||||||||
| 1230 | ||||||||
| 1300 | ||||||||
| 1330 | ||||||||
| 1400 | ||||||||
| 1430 | ||||||||
| 1500 | ||||||||
| 1530 | 32097 TUT (TD01) 1530-1630 Mon TR+64 Wk2-13 | 32098 TUT (TD02) 1530-1630 Thu TR+65 Wk2-13 | ||||||
| 1600 | ||||||||
| 1630 | 32097 TUT (TD01) 1630-1730 Mon TR+64 Wk2-13 | 32098 TUT (TD02) 1630-1730 Thu TR+65 Wk2-13 | ||||||
| 1700 | ||||||||
| 1730 | ||||||||
| 1800 | ||||||||
| 1830 | ||||||||
| 1900 | 37513 TUT (PT11) 1900-2000 Tue TR88 Wk2-13 | 37514 TUT (PT12) 1900-2000 Tue TR89 Wk2-13 | 37515 TUT (PT13) 1900-2000 Tue TR90 Wk2-13 | 37516 TUT (PT14) 1900-2000 Tue TR91 Wk2-13 | ||||
| 1930 | ||||||||
| 2000 | 37513 TUT (PT11) 2000-2100 Tue TR88 Wk2-13 | 37514 TUT (PT12) 2000-2100 Tue TR89 Wk2-13 | 37515 TUT (PT13) 2000-2100 Tue TR90 Wk2-13 | 37516 TUT (PT14) 2000-2100 Tue TR91 Wk2-13 | ||||
| 2030 | ||||||||
