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AY2016/2017 Semester 2
Binary variables and logic gates; implementation technologies; combinatorial circuits; binary integers and arithmetic circuits; sequential circuits; simple state machines; digital design using hardware description languages.
| AUs | 3.0 AUs |
| Categories | CoreMinorsBDE |
| Not Available To Programme | BCE, CE, CEEC |
| Not Available As BDE/UE To Programme | BUS(IT), EEE, EEEC, ENG, ENG(EEE), IEEC, IEM |
| Mutually Exclusive With | CSC104 |
| Exam |
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 930 | |||||
| 1000 | |||||
| 1030 | |||||
| 1100 | |||||
| 1130 | |||||
| 1200 | |||||
| 1230 | |||||
| 1300 | |||||
| 1330 | |||||
| 1400 | |||||
| 1430 | |||||
| 1500 | |||||
| 1530 | |||||
| 1600 | |||||
| 1630 | |||||
| 1700 | |||||
| 1730 | |||||
| 1800 |
| Mon | Tue | Wed | Thu | Fri | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 830 | 10343 LAB (DD1) 0830-1030 Mon HWLAB3 Odd Weeks | 10366 LAB (DD1) 0830-1030 Mon HWLAB3 Odd Weeks | 10401 LAB (DD1) 0830-1030 Mon HWLAB3 Odd Weeks | 10521 LAB (DD1) 0830-1030 Mon HWLAB3 Odd Weeks | 10455 LAB (DD2) 0830-1030 Thu HWLAB3 Even Weeks | ||||||||
| 900 | |||||||||||||
| 930 | |||||||||||||
| 1000 | |||||||||||||
| 1030 | COMMON LEC (CE1) 1030-1130 Tue LT12 | COMMON LEC (CS1) 1030-1130 Tue LT12 | COMMON LEC (CE1) 1030-1130 Fri LT12 | COMMON LEC (CS1) 1030-1130 Fri LT12 | |||||||||
| 1100 | |||||||||||||
| 1130 | |||||||||||||
| 1200 | |||||||||||||
| 1230 | |||||||||||||
| 1300 | |||||||||||||
| 1330 | |||||||||||||
| 1400 | |||||||||||||
| 1430 | 10455 TUT (DD2) 1430-1530 Mon TR+15 Wk2-13 | ||||||||||||
| 1500 | |||||||||||||
| 1530 | 10343 TUT (DD1) 1530-1630 Mon TR+15 | 10366 TUT (DD1) 1530-1630 Mon TR+15 Wk2-13 | 10366 TUT (DD1) 1530-1630 Mon TR+15 Wk2-13, | 10401 TUT (DD1) 1530-1630 Mon TR+15 Wk2-13 | 10401 TUT (DD1) 1530-1630 Mon TR+15 Wk2-13, | 10521 TUT (DD1) 1530-1630 Mon TR+15 Wk2-13 | 10521 TUT (DD1) 1530-1630 Mon TR+15 Wk2-13, | ||||||
| 1600 | |||||||||||||
