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AY2014/2015 Semester 2
Reconfigurable/Programmable systems-on-a-chip offer superior compute density / energy density compared to other forms of compute organization. The students taking this course will: Learn to describe computation using a modern SoC platform based on an high- level synthesis tool-flows. Understand and quantify the importance of memory/communication costs when designing with SoC application development. Characterize goodness metrics of SoC architectures such as area, delay, and power of the mapping. Explore different mappings to build a tradeoff space for optimization. Work/organize in teams of 4 and attack a complex SoC programming challenge on the Zynq Platform. They will deliver a (1) draft plan presentation, (2) mid-term review presentation, and (3) final project presentation along with a final project report.
| AUs | 3.0 AUs |
| Categories | CoreBDE |
| Not Available To All Programme With | (Admyr 2004-2010) |
| Mutually Exclusive With | CPE485 |
| Exam |
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| 1800 |
| Mon | Tue | Wed | Thu | Fri | |
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| 1030 | COMMON LEC (CE4) 1030-1130 Wed LT11 | ||||
| 1100 | |||||
| 1130 | |||||
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| 1330 | |||||
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| 1430 | COMMON LEC (CE4) 1430-1530 Mon LT11 | ||||
| 1500 | |||||
| 1530 | 10159 TUT (CE4) 1530-1700 Thu HWLAB1 | ||||
| 1600 | |||||
| 1630 |