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Historical snapshot — AY2018/2019 Semester 1 · View current offering →
ModsCE3001AY2018/2019 Semester 1

Advanced Computer Architecture

AY2018/2019 Semester 1

Processor System Design: CPU interfaces, clock, control, data & address bus; System firmware. The CPU Architecture: including ISA, compiler relationship, control, pipelining, hazards, CISC/RISC/VLIW and issues of ILP. Memory Systems: cache, virtual memory systems and the MMU, access methods, reliability, error detection/correction. Performance Enhancements: superscalar; branching issues, multithreading, scalability, co-processors and enhancement units. Interfacing and Communications: I/O fundamentals, interrupts and interfacing, buses, protocols and arbitration. Computer Arithmetic: range, precision, real numbers, floating point and conversion, multi-precision arithmetic Multiprocessing: multiprocessing architectures and interconnections, shared memory and coherence, memory solutions Future directions: low power computing; testing, JTAG, system-on-chip and multi-core implementations, embedded systems issues, comparison of computational on CPU, DSP, FPGA and GPU.

AUs3.0 AUs
CategoriesCoreBDE
Not Available To ProgrammeBCG, CSC, CSEC
Exam

Available Indexes

MonTueWedThuFri
930

COMMON LEC (CE3)

0930-1030 Mon

LT4

13807 TUT (BCG3)

0930-1030 Tue

TR+16

Wk2-13

1000
1030

10056 LAB (SEP1)

1030-1130 Tue

HWLAB3

Odd Weeks

13807 LAB (BCG3)

1030-1130 Fri

HWLAB1

Even Weeks

1100
1130

10055 TUT (SEA1)

1130-1230 Mon

TR+18

Wk2-13

10056 LAB (SEP1)

1130-1230 Tue

HWLAB3

Odd Weeks

13807 LAB (BCG3)

1130-1230 Fri

HWLAB1

Even Weeks

1200
1230
1300
1330

10056 TUT (SEP1)

1330-1430 Fri

LHN-TR+13

Wk2-13

1400
1430

10055 LAB (SEA1)

1430-1530 Wed

HWLAB3

Even Weeks

COMMON LEC (CE3)

1430-1530 Fri

LT2A

1500
1530

10055 LAB (SEA1)

1530-1630 Wed

HWLAB3

Even Weeks

1600