Historical snapshot — AY2017/2018 Semester 1 · View current offering →
ModsCE2007AY2017/2018 Semester 1
MicroprocessorBased Systems Design
AY2017/2018 Semester 1
Microprocessor packages and pins; FPGA soft-core processors; Memory technology and characteristics; Digital peripherals and applications; Sensors and analogue signal conditioning; Data conversion; Actuator control; Displays; Higher integration for speed, electrical power, or density; Practical issues.
| AUs | 3.0 AUs |
| Categories | CoreMinorsBDE |
| Not Available To Programme | BCG, CE(2004-2010), CSC, CSEC, EEE, EEEC, ENG |
| Mutually Exclusive With | CPE206 |
| Exam |
Available Indexes
| Mon | Tue | Wed | Thu | Fri | ||
|---|---|---|---|---|---|---|
| 1030 | COMMON LEC (CE2) 1030-1230 Mon LT10 | |||||
| 1100 | ||||||
| 1130 | ||||||
| 1200 | ||||||
| 1230 | ||||||
| 1300 | ||||||
| 1330 | 10048 TUT (SEP2) 1330-1430 Wed TR+37 Wk2-13 | |||||
| 1400 | ||||||
| 1430 | 10047 LAB (SEP1) 1430-1730 Tue HWLAB2 Even Weeks | 10048 LAB (SEP2) 1430-1730 Wed HWLAB2 Odd Weeks | 10047 TUT (SEP1) 1430-1530 Wed TR+16 Wk2-13 | |||
| 1500 | ||||||
| 1530 | ||||||
| 1600 | ||||||
| 1630 | ||||||
| 1700 | ||||||