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AY2017/2018 Semester 2
Fundamental of Computer Design. Instruction Set Architecture. Memory-system Architecture. Buses, Storage Devices and I/O System. RISC Design. Pipelining.
| AUs | 3.0 AUs |
| Categories | Core |
| Mutually Exclusive With | EE4756, EE4758 |
| Exam |
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 930 | |||||
| 1000 | |||||
| 1030 | |||||
| 1100 | |||||
| 1130 | |||||
| 1200 | |||||
| 1230 | |||||
| 1300 | |||||
| 1330 | |||||
| 1400 | |||||
| 1430 | |||||
| 1500 | |||||
| 1530 | |||||
| 1600 | |||||
| 1630 | |||||
| 1700 | |||||
| 1730 | |||||
| 1800 |
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 930 | COMMON LEC (LE) 0930-1030 Wed LT29 | ||||
| 1000 | |||||
| 1030 | |||||
| 1100 | |||||
| 1130 | COMMON LEC (LE) 1130-1230 Thu LT28 | ||||
| 1200 | |||||
| 1230 | 36094 TUT (F32) 1230-1330 Fri TR+67 Wk2-13 | ||||
| 1300 | |||||
| 1330 | 36093 TUT (F31) 1330-1430 Wed TR+67 Wk2-13 | ||||
| 1400 |
