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AY2014/2015 Semester 1
Binary variables and logic gates; implementation technologies; combinatorial circuits; binary integers and arithmetic circuits; sequential circuits; simple state machines; digital design using hardware description languages.
| AUs | 3.0 AUs |
| Categories | CoreMinorsBDE |
| Not Available To Programme | BCG, CSC, CSEC |
| Not Available As BDE/UE To Programme | BUS(IT), EEE, EEEC, ENG, ENG(EEE), IEEC, IEM |
| Mutually Exclusive With | CPE104 |
| Exam |
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 930 | |||||
| 1000 | |||||
| 1030 | |||||
| 1100 | |||||
| 1130 | |||||
| 1200 | |||||
| 1230 | |||||
| 1300 | |||||
| 1330 | |||||
| 1400 | |||||
| 1430 | |||||
| 1500 | |||||
| 1530 | |||||
| 1600 | |||||
| 1630 | |||||
| 1700 | |||||
| 1730 | |||||
| 1800 |
| Mon | Tue | Wed | Thu | Fri | |||
|---|---|---|---|---|---|---|---|
| 830 | 10031 LAB (FE1) 0830-1030 Tue HWLAB3 Odd Weeks | 10032 LAB (FE2) 0830-1030 Tue HWLAB3 Even Weeks | |||||
| 900 | |||||||
| 930 | |||||||
| 1000 | |||||||
| 1030 | 10031 TUT (FE1) 1030-1130 Wed TR+9 Wk2-13 | ||||||
| 1100 | |||||||
| 1130 | 10032 TUT (FE2) 1130-1230 Wed TR18 Wk2-13 | ||||||
| 1200 | |||||||
| 1230 | |||||||
| 1300 | |||||||
| 1330 | COMMON LEC (CE1) 1330-1430 Tue LT1 | ||||||
| 1400 | |||||||
| 1430 | 10034 TUT (FEP1) 1430-1530 Tue TR+9 Wk2-13 | 10034 LAB (FEP1) 1430-1630 Wed HWLAB3 Odd Weeks | 10035 LAB (FEP2) 1430-1630 Wed HWLAB3 Even Weeks | ||||
| 1500 | |||||||
| 1530 | 10035 TUT (FEP2) 1530-1630 Tue TR+8 Wk2-13 | COMMON LEC (CE1) 1530-1630 Thu LT2A | |||||
| 1600 | |||||||
